FT4222H: Difference between revisions

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Control transfers identified by looking at usbmon logs of libft4222:
Control transfers identified by looking at usbmon logs of libft4222:
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  <nowiki>
info:                                                                         
20 00 version: 4B chip version, 8B unknown                                     
20 01 config? 13B                                                             
        1B cnfmode (straps)                                                   
        2B unknown (01 00)                                                     
        1B interface count?                                                   
        1B endpoint count?                                                     
        2B unknown (03 03)                                                     
        1B changes with cnfmode (00 => 03, 01 => 00, 10 => 00, 11 => 03)       
        5B unknown (01 01 ff 3e d0)                                           
                                                                               
config:
21 04 set clock: 60MHz => 0, 24MHz => 1, 48MHz => 2, 80MHz => 3
21 04 set clock: 60MHz => 0, 24MHz => 1, 48MHz => 2, 80MHz => 3
21 05 set mode: i2c master => 1, i2c slave => 2, spi master => 3, spi slave => 4
21 05 set mode: i2c master => 1, i2c slave => 2, spi master => 3, spi slave => 4

Latest revision as of 15:03, 14 January 2024

Commands

Control transfers identified by looking at usbmon logs of libft4222:

info:                                                                           
20 00 version: 4B chip version, 8B unknown                                      
20 01 config? 13B                                                               
        1B cnfmode (straps)                                                     
        2B unknown (01 00)                                                      
        1B interface count?                                                     
        1B endpoint count?                                                      
        2B unknown (03 03)                                                      
        1B changes with cnfmode (00 => 03, 01 => 00, 10 => 00, 11 => 03)        
        5B unknown (01 01 ff 3e d0)                                             
                                                                                
config:
21 04 set clock: 60MHz => 0, 24MHz => 1, 48MHz => 2, 80MHz => 3
21 05 set mode: i2c master => 1, i2c slave => 2, spi master => 3, spi slave => 4
21 42 spi io: lines => 1 / 2 / 4
21 43 spi cs active: low => 0, high => 1                           
21 44 spi div: log2 => 1..9 
21 45 spi idle (cpol?)
21 46 spi capture (cpha?)
21 48 spi ss mask
21 49 spi reset transaction => sso (followed by 4a(00) for (full) reset)
21 4a spi reset (preceded by 49(00)) => 00; reset/update after set io => 01
21 a0 spi drive => (clock << 4 | io << 2 | sso << 0) (4ma: 0, 8ma: 1, 12ma: 2, 16ma: 3)

init sequence: 49 42 44 45 46 43 48 05
        reset trans, io lines, div, cpol, cpha, cs active, cs mask, spi master

strapped config
cnf0 (1sso+gpio): index => 1 (+ index=>2 flush)
cnf1 (3sso+gpio): index => 1 (+ index=>2,3,4 flush)
cnf2 (4sso):      index => 1 (+ index=>2,3,4 flush)
cnf3 (1sso):      index => 0 (can be detected by bNumInterfaces == 1)