Technology

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Flash chip overview

Modern mainboards store the BIOS in a reprogrammable flash chip. There are hundreds of different flash (EEPROM) chips, with variables such as memory size, speed, communication bus (Parallel, LPC, FWH, SPI) and packaging to name just a few.

Packaging/housing/form factor

Probably the only property of flash chips which is completely irrelevant to flashrom. The BIOS copyright holders often place a fancy sticker on the BIOS chip showing a name or logo, BIOS version, serial number and copyright notice (all of which is also irrelevant for flashrom).

DIP32: Dual In-line Package, 32 pins

A rectangular black plastic block with 16 pins along each of the two longer sides of the package (32 pins in total). DIP32 chips can be socketed which means they are detachable from the mainboard using physical force. Since they haven't been moved in and out of the socket very much (yet, hehe) they can appear to be quite difficult to release from the socket. One way to remove a DIP32 chip from a socket is by prying a thin screwdriver in between the plastic package and the socket, along the shorter sides where there are no pins, and then gently bending the screwdriver to push the chip upwards, away from the mainboard. Alternate between the two sides to avoid bending the pins, and don't touch any of the pins with the screwdriver (see FAQ about ESD, electro-static discharge). If the chip is soldered directly to the mainboard, it has to be desoldered in order to be reprogrammed outside the mainboard. If you do this, it's a good idea to solder a socket to the mainboard instead, to ease any future experiments.

PLCC32: Plastic Leaded Chip Carrier, 32 pins

Black plastic block again, but this one is much more square. PLCC32 was becoming the standard for mainboards after DIP32 chips because of its smaller physical size. PLCC can also be socketed or soldered directly to the mainboard. Socketed PLCC32 chips can be removed using a special PLCC removal tool, or using a piece of nylon line tied in a loop around the chip and pulled swiftly straight up, or bending/prying using small screwdrivers if one is careful. PLCC32 sockets are often fragile so the screwdriver approach is not recommended. While the nylon line method sounds strange it works well. Desoldering PLCC32 chips and soldering on a socket be done] using either a desoldering station or even just a heat gun. You can also cut the chip with a sharp knife, but it will be destroyed in the process, of course.

DIP8: Dual In-line Package, 8 pins

Most recent boards use DIP8 chips (which always employ the SPI protocol) or SO8/SOIC8 chips (see below). DIP8 chips are always socketed, and can thus be easily removed (and hot-swapped), for example using a small screwdriver. This allows for relatively simple recovery in case of an incorrectly flashed chip.

SO8/SOIC8: Small-Outline Integrated Circuit, 8 pins

Similarly to the DIP8 chips, these are always use the SPI protocol. However, SO8/SOIC8 chips are always soldered onto the board directly.

TSOP: Thin Small-Outline Package, 32, 40, or 48 pins

TSOPs are often used in embedded systems where size is important and there is no need for replacement in the field. It is possible to (de)solder TSOPs by hand, but it's not trivial and a reasonable amount of soldering skills are required.

Communication bus protocol

There are four major communication bus protocols for flash chips, each with multiple subtle variants in the command set:

  • Parallel: The oldest flash bus, phased out on mainboards around 2002.
  • LPC: Low Pin Count, a standard introduced ca. 1998.
  • FWH: Firmware Hub, a variant of the LPC standard introduced at the same time. FWH is a special case variant of LPC with one bit set differently in the memory read/write commands. That means some data sheets mention the chips speak LPC although they will not respond to regular LPC read/write cycles.
  • SPI: Serial Peripheral Interface, introduced ca. 2006.

Here's an attempt to create a marketing language -> chip type mapping:

  • JEDEC Flash -> Parallel (well, mostly)
  • FWH -> FWH
  • Firmware Hub -> FWH
  • LPC Firmware -> FWH
  • Firmware Memory -> FWH
  • Low Pin Count (if Firmware/FWH is not mentioned) -> LPC
  • LPC (if Firmware is not mentioned) -> LPC
  • Serial Flash -> SPI

SST data sheets have the following conventions:

  • LPC Memory Read -> LPC
  • Firmware Memory Read -> FWH

If both are mentioned, the chip supports both.

If you're not sure about whether a device is LPC or FWH, look at the read/write cycle definitions.

FWH
Clock Cycle Field Name Field contents Comments
1 START 1101/1110 1101 for READ, 1110 for WRITE.
2 IDSEL 0000 to 1111 IDSEL value to be shifted out to the chip.
3-9 IMADDR YYYY The address to be read/written. 7 cycles total == 28 bits.
10+ ... ... ...
LPC
Clock Cycle Field Name Field contents Comments
1 START 0000 ...
2 CYCLETYPE+DIRECTION 010X/011X 010X for READ, 011X for WRITE. X means "reserved".
3-10 ADDRESS YYYY The address to be read/written. 8 cycles total == 32 bits.
11+ ... ... ...

Generally, a parallel flash chip will not speak any other protocols. SPI flash chips also don't speak any other protocols. LPC flash chips sometimes speak FWH as well and vice versa, but they will not speak any protocols besides LPC/FWH.

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